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1 比较指令

1.1 CMP (extended register)

Compare (extended register) subtracts a sign or zero-extended register value, followed by an optional left shift amount, from a register value. The argument that is extended from the register can be a byte, halfword, word, or doubleword. It updates the condition flags based on the result, and discards the result.
This instruction is an alias of the SUBS (extended register) instruction. This means that:
• The encodings in this description are named to match the encodings of SUBS (extended register).
• The description of SUBS (extended register) gives the operational pseudocode for this instruction.

1.2 CMP (immediate)

Compare (immediate) subtracts an optionally-shifted immediate value from a register value. It updates the condition flags based on the result, and discards the result.
This instruction is an alias of the SUBS (immediate) instruction. This means that:
• The encodings in this description are named to match the encodings of SUBS (immediate).
• The description of SUBS (immediate) gives the operational pseudocode for this instruction.

1.3 CMP (shifted register)

Compare (shifted register) subtracts an optionally-shifted register value from a register value. It updates the condition flags based on the result, and discards the result.
This instruction is an alias of the SUBS (shifted register) instruction. This means that:
• The encodings in this description are named to match the encodings of SUBS (shifted register).
• The description of SUBS (shifted register) gives the operational pseudocode for this instruction.

1.4 CMN (extended register)

Compare Negative (extended register) adds a register value and a sign or zero-extended register value, followed by an optional left shift amount. The argument that is extended from the register can be a byte, halfword, word, or doubleword. It updates the condition flags based on the result, and discards the result.
This instruction is an alias of the ADDS (extended register) instruction. This means that:
• The encodings in this description are named to match the encodings of ADDS (extended register).
• The description of ADDS (extended register) gives the operational pseudocode for this instruction.

1.5 CMN (immediate)

Compare Negative (immediate) adds a register value and an optionally-shifted immediate value. It updates the condition flags based on the result, and discards the result.
This instruction is an alias of the ADDS (immediate) instruction. This means that:
• The encodings in this description are named to match the encodings of ADDS (immediate).
• The description of ADDS (immediate) gives the operational pseudocode for this instruction.

1.6 CMN (shifted register)

Compare Negative (shifted register) adds a register value and an optionally-shifted register value. It updates the condition flags based on the result, and discards the result.
This instruction is an alias of the ADDS (shifted register) instruction. This means that:
• The encodings in this description are named to match the encodings of ADDS (shifted register).
• The description of ADDS (shifted register) gives the operational pseudocode for this instruction.

1.7 比较指令测试代码

/*compare_branch lab1: 测试cmp和cmn指令以及条件操作后缀
*/
.global cmp_cmn_test
cmp_cmn_test:/* 测试CMN指令*/mov x1, 1mov x2, -3
1:cmn x1, x2add x2, x2, 1/*查看NZCV操作后缀*/mrs x0, nzcv/*mi： 负数*/b.mi 1b/*测试CMP指令*/mov x2, 3
2:cmp x2, x1add x1, x1, 1/*查看NZCV操作后缀*/mrs x0, nzcv/*cs: 无符号数大于等于*/b.cs 2bret

1.8 cmn测试结果

当cmn x1, x2为负值时，x0寄存器的值为0x80000000，表示N这一位为1，则当前的计算结果为负值。
在此处的cmn x1, x2则相当于adds xzr, x1, x2。忽略结果，保留NZCV位。

1.9 cmp的计算结果

当cmp x2, x1为负值时，x0寄存器的值为0x20000000，表示C这一位为1，则当前的计算结果为产生了无符号溢出。
在此处的cmp x2, x1则相当于subs xzr, x2, x1。忽略结果，保留NZCV位。

1.10 常见的状态码

2 条件选择指令

2.1 csel 条件选择指令

Conditional Select returns, in the destination register, the value of the first source register if the condition is TRUE, and otherwise returns the value of the second source register.

2.2 CSET

Conditional Set sets the destination register to 1 if the condition is TRUE, and otherwise sets it to 0.
This instruction is an alias of the CSINC instruction. This means that:
• The encodings in this description are named to match the encodings of CSINC.
• The description of CSINC gives the operational pseudocode for this instruction.

2.3 CSINC

Conditional Select Increment returns, in the destination register, the value of the first source register if the condition is TRUE, and otherwise returns the value of the second source register incremented by 1.
This instruction is used by the aliases CINC and CSET. See Alias conditions for details of when each alias is preferred.

2.4 测试代码

/*compare_branch lab2: 条件选择指令csel
*/
.global csel_test
csel_test:cmp x0, 0sub x2, x1, 1add x3, x1, 2csel x0, x3, x2, eqret

2.5 测试之前的状态

2.6 测试之后的结果